Taiwan Semiconductor Manufacturing Company has made public what many in the industry have known for some time: Don’t expect 450mm until 2018. In an article in the Taiwan Times, TSMC’s technology roadmap is discussed, which now includes 10nm transistors on 450mm in 2018 (high volume manufacturing). While the slip is somewhat blamed on suppliers in the article, placing blame does little to really move things forward in a collaborative manner. With the economic and technology hurdles ahead, collaboration is seriously required–no finger pointing allowed.
The reality that 300mm and 200mm wafer size transitions also slipped–multiple times. Each time, suppliers took the brunt of the wasted investment as they retooled for the next node. Hopefully many suppliers will have read the indicators andor had the discipline to not invest until they could see that the industry leaders were actually leading (and investing). The indicators that the industry leaders (Intel, Samsung, TSMC, and Globalfoundries) are truly leading were: 1) formation of the Global 450 Consortium last year, 2) investment by New York State into the 450mm research effort, 3) the inclusion of suppliers into the consortium, and 4) major investment by the industry leaders into the critical path technology that could make/break 450mm, including inspection and lithography.
Prior to these key indicators, much of the progress in 450mm was somewhat overstated. Remember that quite a bit of activity was started in 2007/2008, with a target of 2012 production. There were necessary, but insufficient investments and activities which took place, including wafer and wafer carrier standards and testing of load ports, to name but a few. In our economic modeling activity (SEMI, chipmakers, and suppliers, along with MIT), our big assumption was that it would take about 5 years of R&D investment in 450mm as a ramp-up to high volume production. This assumption was based on the best data we had at the time. Judging from “real” investment which has now been taking place over just the past year, a 2018 date is not, in fact, a surprise. A number of industry analysts and groups made predictions on 2018 and 11nm a few years ago.
So, on the positive side, with a realistic date being pretty much agreed upon now by all of the big players in the industry and significant investments being turned on targeted at key technology hurdles, it’s probably time to really start thinking 450mm. Granted, many suppliers were seriously considering the impact last summer when they were asked to join up with G450C or be left out in the cold, but some of the agreements could have been lip service to keep chip makers happy with them. Now that money is flowing, timelines are coming together, and key, initial research tools (i.e. inspection) are being delivered, I would imagine that plans are solidifying. A key factor will be when ASML (or Nikon) divulges that 10nm and below will only be supported on 450mm platforms–that to do otherwise is just too expensive. This happened with 300nm at 65nm and below and I expect a similar path for 450mm as well. At that point, if you don’t have 450mm plans, it may be hard to compete with companies already well integrated into the G450C program.
On a side note, I noticed that TSMC is now using a 2.5x multiplier for the number of chips available on 450mm vs. 300mm. This is totally consistent with the analysis I had posted last week, reflecting about a 11% chip packing efficiency improvement for 450mm. Granted, this assumes a decent-sized chip, but this “expectation” seems grounded in reality.
